The present invention generally relates to semiconductor devices and more particularly to a semiconductor device having improved operational speed as a result of application of stress.
With progress in the art of device miniaturization, it is now becoming possible to realize ultrafine and ultra fast semiconductor devices having a gate length of 100 nm or less.
With such ultrafine and ultra fast transistors, the area of the channel region right underneath the gate electrode is much smaller than conventional semiconductor devices, and thus, the mobility of electrons or holes traveling through the channel region is influenced heavily by the stress applied to such a channel region.
Thus, various attempts have been made for optimizing the stress applied to the channel region in the prospect of improving the operational speed of the semiconductor device further.